A Modular Domain-Aware Neural Network Architecture for Power Amplifier Linearization
Rantala, Lotta; Fischer-Bühner, Arne; Brihuega, Alberto; Sharifipour, Sasan; Susarla, Praneeth; López, Miguel Bordallo; Álvarez Casado, Constantino (2026-02-19)
IEEE
19.02.2026
L. Rantala et al., "A Modular Domain-Aware Neural Network Architecture for Power Amplifier Linearization," 2025 16th International Conference on Information and Communication Technology Convergence (ICTC), Jeju, Korea, Republic of, 2025, pp. 801-806, doi: 10.1109/ICTC66702.2025.11388795.
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© 2025 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
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Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:oulu-202604272788
https://urn.fi/URN:NBN:fi:oulu-202604272788
Tiivistelmä
Abstract
Next-generation wireless systems demand highly efficient power amplifiers (PAs), which introduce complex non-linearities and memory effects. Traditional digital pre-distortion (DPD) methods, such as the Generalized Memory Polynomial (GMP), struggle with these impairments. This paper proposes a Modular Domain-Aware Time-Delay Neural Network (MDA-TDNN), a hybrid physically-inspired architecture that combines established signal processing components into a unified TDNN-based structure. Rather than introducing fundamentally new building blocks, the contribution lies in the systematic integration and evaluation of these components, providing a structured characterization of their individual and joint effects on DPD performance. It includes a Finite Impulse Response (FIR) layer for memory modeling, a phase normalization layer for complex signal behavior, an envelope layer for amplitude non-linearities, and a residual path for stable training. MDA-TDNN was trained on an ideal dataset generated by an Iterative Learning Control scheme and experimentally validated on an RF testbed using a 75 MHz 5G NR signal. The results demonstrate that MDA-TDNN outperforms GMP by 7.95 dB in Adjacent Channel Leakage Ratio (ACLR), achieving performance within 1 dB of ideal DPD. An ablation study highlights the importance of phase normalization and FIR layers. These findings validate the effectiveness of domain-aware neural architectures for PA linearization.
Next-generation wireless systems demand highly efficient power amplifiers (PAs), which introduce complex non-linearities and memory effects. Traditional digital pre-distortion (DPD) methods, such as the Generalized Memory Polynomial (GMP), struggle with these impairments. This paper proposes a Modular Domain-Aware Time-Delay Neural Network (MDA-TDNN), a hybrid physically-inspired architecture that combines established signal processing components into a unified TDNN-based structure. Rather than introducing fundamentally new building blocks, the contribution lies in the systematic integration and evaluation of these components, providing a structured characterization of their individual and joint effects on DPD performance. It includes a Finite Impulse Response (FIR) layer for memory modeling, a phase normalization layer for complex signal behavior, an envelope layer for amplitude non-linearities, and a residual path for stable training. MDA-TDNN was trained on an ideal dataset generated by an Iterative Learning Control scheme and experimentally validated on an RF testbed using a 75 MHz 5G NR signal. The results demonstrate that MDA-TDNN outperforms GMP by 7.95 dB in Adjacent Channel Leakage Ratio (ACLR), achieving performance within 1 dB of ideal DPD. An ablation study highlights the importance of phase normalization and FIR layers. These findings validate the effectiveness of domain-aware neural architectures for PA linearization.
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