Low power LDPC decoder via voltage down-scaling
Valkama, Joonas (2024-05-15)
J. Valkama
15.05.2024
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Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:oulu-202405153532
https://urn.fi/URN:NBN:fi:oulu-202405153532
Tiivistelmä
The number of IoT (Internet of Things) devices is growing fast and a substantial proportion of their energy consumption is due to data transmission and processing. Especially the error correction in the decoder eats up large chunk of the limited power provided to these devices mainly by batteries.
Voltage scaling is a straightforward method to save power, however, down-scaling the voltage can lead to timing errors that cause failures in the logic circuit. While many devices have notable safety margins that can be utilized for voltage scaling, the potential lowest working voltages depend on the environment and unique differences in circuits. Due to manufacturing and ambient variations, every circuit may operate differently when voltage is reduced, hence, finding the lowest possible operating voltage becomes complex and expensive.
This thesis looks into operating Low-Density Parity Check (LDPC) decoder with lowered voltage and proposes a solution for reliable voltage scaler that uses Signal to Noise Ratio (SNR) estimate and Cyclic Redundancy Check (CRC) error detection to dynamically achieve as low as possible operating voltage.
The thesis implements two different LDPC decoders on Zynq System on a Chip (SoC) and explores the effects of lowered voltage on those decoders. The hardware tests show that it is possible to achieve power savings of over 50\%. Based on the results, the hypothesis is that in certain scenarios, for example, IoT nodes with relatively fixed channel could achieve similar power savings by using the proposed voltage scaling policy.
Voltage scaling is a straightforward method to save power, however, down-scaling the voltage can lead to timing errors that cause failures in the logic circuit. While many devices have notable safety margins that can be utilized for voltage scaling, the potential lowest working voltages depend on the environment and unique differences in circuits. Due to manufacturing and ambient variations, every circuit may operate differently when voltage is reduced, hence, finding the lowest possible operating voltage becomes complex and expensive.
This thesis looks into operating Low-Density Parity Check (LDPC) decoder with lowered voltage and proposes a solution for reliable voltage scaler that uses Signal to Noise Ratio (SNR) estimate and Cyclic Redundancy Check (CRC) error detection to dynamically achieve as low as possible operating voltage.
The thesis implements two different LDPC decoders on Zynq System on a Chip (SoC) and explores the effects of lowered voltage on those decoders. The hardware tests show that it is possible to achieve power savings of over 50\%. Based on the results, the hypothesis is that in certain scenarios, for example, IoT nodes with relatively fixed channel could achieve similar power savings by using the proposed voltage scaling policy.
Kokoelmat
- Avoin saatavuus [37559]