A 5.4-GHz 2/3/4-modulus fractional frequency divider circuit in 28-nm CMOS
Cheung, Tze Hin; Ryynänen, Jussi; Pärssinen, Aarno; Stadius, Kari (2021-04-27)
Cheung, T. H., Ryynänen, J., Pärssinen, A. & Stadius, K. (2021). A 5.4-GHz 2/3/4-modulus fractional frequency divider circuit in 28-nm CMOS. In 2021 IEEE International Symposium on Circuits and Systems (ISCAS) : proceedings, 9401405. https://doi.org/10.1109/ISCAS51556.2021.9401405
© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
https://rightsstatements.org/vocab/InC/1.0/
https://urn.fi/URN:NBN:fi-fe2021122763293
Tiivistelmä
Abstract
This paper describes the design and post-layout simulations of a 2/3/4- modulus frequency divider circuit, accompanied with an accumulator that controls the division count. The circuit is capable of operating as an integer or as a fractional divider. Key topic of this paper is the merging of div-2/3 and div-3/4 circuits into a single compact circuit that solves an issue of a forbidden state in fractional-division operation. The circuit is designed with 28-nm CMOS technology and the post-layout simulations indicate an operating input frequency range of 0.3–5.4 GHz with 13-bit fractional frequency resolution between division ratios of 2–4. The divider occupies only 40 µm x 30 µm while consuming 2.0 mW at 5.4 GHz input frequency.
Kokoelmat
- Avoin saatavuus [34566]