A 45nm CMOS SOI, four element phased array receiver supporting two MIMO channels for 5G
Shaheen, Rana A.; Akbar, Rehman; Sethi, Alok; Aikio, Janne P.; Rahkonen, Timo; Pärssinen, Aarno (2017-12-01)
R. A. Shaheen, R. Akbar, A. Sethi, J. P. Aikio, T. Rahkonen and A. Pärssinen, "A 45nm CMOS SOI, four element phased array receiver supporting two MIMO channels for 5G," 2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), Linkoping, 2017, pp. 1-4.
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https://urn.fi/URN:NBN:fi-fe2018073033112
Tiivistelmä
Abstract
A four element, two channel Multiple-Input Multiple-Output (MIMO) phased array receiver at 15 GHz is designed and fabricated in 45nm CMOS SOI process. The receiver consists of two independent four-antenna phasedarrays for hybrid beamforming and MIMO processing in digital domain. Phase and amplitude control is based on RF IQ vector modulator (VM) at carrier frequency. Measured downconversion gain and noise figure (NF) of one path are 23 dB and 5.4dB, respectively, giving estimated 3.4 dB NF for the IC when simulated PCB and matching losses are taken into account. 1 dB compression and IIP3 points are -37 dBm and -28 dBm, respectively. One phased array consumes 486 mW DC power from 1.2V power supply. Total chip area is 5.69 mm².
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